PURPOSE:To increase the diameter of crystal grain in a solid phase growth and to shorten the growing time by implanting inert ions to a channel region interposed between a source region and a drain region, then solid-phase growing at predetermined temperature, forming a gate electrodes, and then implanting an impurity to the source region and the drain region, and activating at predetermined temperature. CONSTITUTION:The main surface of a low melting point glass substrate 21 is coated with a polycrystalline Si layer (or a-Si:H)22, insularly formed, and removed except a predetermined region, Si<+> ions 26 are selectively implanted through a mask to the region which includes the channel region 23 of the layer 22 to convert the region to an amorphous region. Then, the region which includes the region 23 is solid-phase grown by annealing at 650 deg.C or lower. A polycrystalline Si gate electrode 27 is formed through a gate insulating film 26 on the region 23, n-type impurity ions (P<+>)28 are implanted to the electrode 27, source and drain regions 24, 25 to form an amorphous region to be activated at 650 deg.C or lower. After an interlayer insulating layer 9 is formed, source and drain electrodes 10, 11 are formed to obtain an FET30.